Tae-Ryong Kim

Beom-Jin Kim

Sang-Hyun Choi

Yoon-Ji Lee

Jong-Yong Park

Dong-Hoon Kim

Seung-Woo Park

Hyun-Jun Jeong

Taehoon Park

Emerging Nanoelectronic Technology and Integrated Systems Lab
School of Electrical Engineering, KAIST
차세대 뉴로모픽 컴퓨팅 디바이스 소자 및 회로

차세대 뉴로모픽 컴퓨팅 디바이스 소자 및 회로

Semiconductor-related research and education at KAIST

Experimental demonstration of third-order memristor-based artificial sensory nervous system for neuro-inspired robotics

Decoupling strategy to separate training andinference withthree-dimensional neuromorphic hardware composed of neurons and hybrid synapses

Self-supervised video processing with self-calibration on an analogue computing platform based on a selector-less memristor array

Tunable ion energy barrier modulation through aliovalent halide doping for reliable and dynamic memristive neuromorphic systems

Ultra-Low Power and Reliable Dynamic Memtransistor Based on Charge Storage Junction FET with Step-Wise Potential Barrier for Energy-Efficient Edge Computing Framework

Phase-change memory via a phase-changeable self-confined nano-filament

Realization of Selector-Memory Bi-Functionality with Self-Current Regulation Utilizing Poly-Crystalline Based GST Electrolyte for Memristor Hardware Development

Linear Conductance Update Improvement of CMOS-Compatible Second-Order Memristors for Fast and Energy-Efficient Training of Neural Network Using a Memristor Crossbar Array

Recent Advances and Future Prospects for Memristive Materials, Devices and Systems

The Effect of Schottky Barrier Modulation on Conduction and Failure Mechanisms of an Ag/WOx/p-Si Based Memristor

Retention Secured Nonlinear and Self-Rectifying Analog Charge Trap Memristor for Energy Efficient Neuromorphic Hardware

The gate injection-based field-effect synapse transistor with linear conductance update for online training

Experimental demonstration of highly reliable dynamic memristor for artificial neuron and neuromorphic computing

Reliable multilevel memristive neuromorphic devices based on amorphous matrix via quasi-1D filament confinement and buffer layer

An Overturned Charge Injection Synaptic Transistor With a Floating-Gate for Neuromorphic Hardware Computing

SPICE study of STDP characteristics in a drift and diffusive memristor-based synapse for neuromorphic

Engineering MoSe2/MoS2 Heterojunction Traps in 2D Transistors for Multilevel Memory, Multiscale Display, and Synaptic Functions

Heterogeneous and Monolithic 3D Integration of III–V-Based Radio Frequency Devices on Si CMOS Circuits

Neural Network Physically Unclonable Function: A Trainable Physically Unclonable Function System with Unassailability against Deep Learning Attacks Using Memristor Array

Nonvolatile and Neuromorphic Memory Devices Using Interfacial Traps in Two Dimensional WSe2/MoTe2 Stack Channel

Conductive-Bridging Random-Access Memories for Emerging Neuromorphic Computing

Perspective: Uniform Switching of Artificial Synapses for Large-Scale Neuromorphic Arrays

SiGe Epitaxial Memory for Neuromorphic Computing with Reproducible High Performance Based on Engineered Dislocations

Remote epitaxy through graphene for two-dimensional material based layer transfer

Experimental Demonstration of Feature Extraction and Dimensionality Reduction using Memristor Networks

Data Clustering using Memristor Networks

Experimental Demonstration of a Second-Order Memristor and Its Ability to Biorealistically Implement Synaptic Plasticity

Tuning Resistive Switching Characteristics of Tantalum Oxide Memristors through Si Doping

Electrochemical Dynamics of Nanoscale Metallic Inclusions in Dielectrics

Retention Failure Analysis of Metal-Oxide Based Resistive Memory

Comprehensive Physical Model of Dynamic Resistive Switching in an Oxide Memristor

Random Telegraph Noise and Resistance Switching Analysis of Oxide Based Resistive Memory

Oxide Heterostructure Resistive Memory

Stochastic Memristive Devices for Computing and Neuromorphic Applications

Efficient Si Nanowire Array Transfer via Bi-Layer Structure Formation Through Metal-Assisted Chemical Etching

Improvement of RRAM Device Performance Through On-Chip Resistors

SiGe epitaxial memory for neuromorphic computing with reproducible high performance based on engineered dislocations

Electrochemical dynamics of nanoscale metallic inclusions in dielectrics

Remote epitaxy through graphene enables two-dimensional material-based layer transfer

Experimental demonstration of a second-order memristor and its ability to biorealistically implement synaptic plasticity

Comprehensive physical model of dynamic resistive switching in an oxide memristor

Stochastic memristive devices for computing and neuromorphic applications

Recent advances and future prospects for memristive materials, devices, and systems

Experimental demonstration of feature extraction and dimensionality reduction using memristor networks

Oxide heterostructure resistive memory

Data clustering using memristor networks

Random telegraph noise and resistance switching analysis of oxide based resistive memory

Tuning resistive switching characteristics of tantalum oxide memristors through Si doping

Conductive-bridging random-access memories for emerging neuromorphic computing

Retention failure analysis of metal-oxide based resistive memory

Nonvolatile and Neuromorphic Memory Devices Using Interfacial Traps in Two-Dimensional WSe 2 /MoTe 2 Stack Channel

Retention secured nonlinear and self‐rectifying analog charge trap memristor for energy‐efficient neuromorphic hardware

Heterogeneous and monolithic 3D integration of III–V-based radio frequency devices on Si CMOS circuits

Shinhyun Choi

Although several types of architecture combining memory cells and transistors have been used to demonstrate artificial synaptic arrays, they usually present limited scalability and high power consumption. Transistor-free analog switching devices may overcome these limitations, yet the typical switching process they rely on—formation of filaments in an amorphous medium—is not easily controlled and hence hampers the spatial and temporal reproducibility of the performance. Here, we demonstrate analog resistive switching devices that possess desired characteristics for neuromorphic computing networks with minimal performance variations using a single-crystalline SiGe layer epitaxially grown on Si as a switching medium. Such epitaxial random access memories utilize threading dislocations in SiGe to confine metal filaments in a defined, one-dimensional channel. This confinement results in drastically …

Nanoscale metal inclusions in or on solid-state dielectrics are an integral part of modern electrocatalysis, optoelectronics, capacitors, metamaterials and memory devices. The properties of these composite systems strongly depend on the size, dispersion of the inclusions and their chemical stability, and are usually considered constant. Here we demonstrate that nanoscale inclusions (for example, clusters) in dielectrics dynamically change their shape, size and position upon applied electric field. Through systematic in situ transmission electron microscopy studies, we show that fundamental electrochemical processes can lead to universally observed nucleation and growth of metal clusters, even for inert metals like platinum. The clusters exhibit diverse dynamic behaviours governed by kinetic factors including ion mobility and redox rates, leading to different filament growth modes and structures in memristive …

Epitaxy—the growth of a crystalline material on a substrate—is crucial for the semiconductor industry, but is often limited by the need for lattice matching between the two material systems. This strict requirement is relaxed for van der Waals epitaxy ,,,,,,,,, , in which epitaxy on layered or two-dimensional (2D) materials is mediated by weak van der Waals interactions, and which also allows facile layer release from 2D surfaces , . It has been thought that 2D materials are the only seed layers for van der Waals epitaxy ,,,,,,, . However, the substrates below 2D materials may still interact with the layers grown during epitaxy (epilayers), as in the case of the so-called wetting transparency documented for graphene ,, . Here we show that the weak van der Waals potential of graphene cannot completely screen the stronger potential field of many substrates, which enables epitaxial growth to occur despite its presence. We use density …

Memristors have been extensively studied for data storage and low-power computation applications. In this study, we show that memristors offer more than simple resistance change. Specifically, the dynamic evolutions of internal state variables allow an oxide-based memristor to exhibit Ca 2+ -like dynamics that natively encode timing information and regulate synaptic weights. Such a device can be modeled as a second-order memristor and allow the implementation of critical synaptic functions realistically using simple spike forms based solely on spike activity.

Memristors have been proposed for a number of applications from nonvolatile memory to neuromorphic systems. Unlike conventional devices based solely on electron transport, memristors operate on the principle of resistive switching (RS) based on redistribution of ions. To date, a number of experimental and modeling studies have been reported to probe the RS mechanism; however, a complete physical picture that can quantitatively describe the dynamic RS behavior is still missing. Here, we present a quantitative and accurate dynamic switching model that not only fully accounts for the rich RS behaviors in memristors in a unified framework but also provides critical insight for continued device design, optimization, and applications. The proposed model reveals the roles of electric field, temperature, oxygen vacancy concentration gradient, and different material and device parameters on RS and allows accurate …

Nanoscale resistive switching devices (memristive devices or memristors) have been studied for a number of applications ranging from non-volatile memory, logic to neuromorphic systems. However a major challenge is to address the potentially large variations in space and time in these nanoscale devices. Here we show that in metal-filament based memristive devices the switching can be fully stochastic. While individual switching events are random, the distribution and probability of switching can be well predicted and controlled. Rather than trying to force high switching probabilities using excess voltage or time, the inherent stochastic nature of resistive switching allows these binary devices to be used as building blocks for novel error-tolerant computing schemes such as stochastic computing and provides the needed “analog” feature for neuromorphic applications. To verify such potential, we demonstrated …

Neuromorphic computing, a computing paradigm inspired by the human brain, enables energy-efficient and fast artificial neural networks. To process information, neuromorphic computing directly mimics the operation of biological neurons in a human brain. To effectively imitate biological neurons with electrical devices, memristor-based artificial neurons attract attention because of their simple structure, energy efficiency, and excellent scalability. However, memristor’s non-reliability issues have been one of the main obstacles for the development of memristor-based artificial neurons and neuromorphic computings. Here, we show a memristor 1R cross-bar array without transistor devices for individual memristor access with low variation, 100% yield, large dynamic range, and fast speed for artificial neuron and neuromorphic computing. Based on the developed memristor, we experimentally demonstrate a memristor …

Memristive technology has been rapidly emerging as a potential alternative to traditional CMOS technology, which is facing fundamental limitations in its development. Since oxide-based resistive switches were demonstrated as memristors in 2008, memristive devices have garnered significant attention due to their biomimetic memory properties, which promise to significantly improve power consumption in computing applications. Here, we provide a comprehensive overview of recent advances in memristive technology, including memristive devices, theory, algorithms, architectures, and systems. In addition, we discuss research directions for various applications of memristive technology including hardware accelerators for artificial intelligence, in-sensor computing, and probabilistic computing. Finally, we provide a forward-looking perspective on the future of memristive technology, outlining the challenges and …

Memristors have been considered as a leading candidate for a number of critical applications ranging from nonvolatile memory to non-Von Neumann computing systems. Feature extraction, which aims to transform input data from a high-dimensional space to a space with fewer dimensions, is an important technique widely used in machine learning and pattern recognition applications. Here, we experimentally demonstrate that memristor arrays can be used to perform principal component analysis, one of the most commonly used feature extraction techniques, through online, unsupervised learning. Using Sanger’s rule, that is, the generalized Hebbian algorithm, the principal components were obtained as the memristor conductances in the network after training. The network was then used to analyze sensory data from a standard breast cancer screening database with high classification success rate (97.1%).

Resistive switching devices are widely believed as a promising candidate for future memory and logic applications. Here we show that by using multilayer oxide heterostructures the switching characteristics can be systematically controlled, ranging from unipolar switching to complementary switching and bipolar switching with linear and nonlinear on-states and high endurance. Each layer can be tailed for a specific function during resistance switching, thus greatly improving the degree of control and flexibility for optimized device performance.

Memristors have emerged as a promising candidate for critical applications such as non-volatile memory as well as non-Von Neumann computing architectures based on neuromorphic and machine learning systems. In this study, we demonstrate that memristors can be used to perform principal component analysis (PCA), an important technique for machine learning and data feature learning. The conductance changes of memristors in response to voltage pulses are studied and modeled with an internal state variable to trace the analog behavior of the device. Unsupervised, online learning is achieved in a memristor crossbar using Sanger’s learning rule, a derivative of Hebb’s rule, to obtain the principal components. The details of weights evolution during training is investigated over learning epochs as a function of training parameters. The effects of device non-uniformity on the PCA network performance are …

Resistive random access memory (RRAM) devices (e.g. “memristors”) are widely believed to be a promising candidate for future memory and logic applications. Although excellent performance has been reported, the nature of resistance switching is still under extensive debate. In this study, we perform systematic investigation of the resistance switching mechanism in a TaOx based RRAM through detailed noise analysis, and show that the resistance switching from high-resistance to low-resistance is accompanied by a semiconductor-to-metal transition mediated by the accumulation of oxygen-vacancies in the conduction path. Specifically, pronounced random-telegraph noise (RTN) with values up to 25% was observed in the device high-resistance state (HRS) but not in the low-resistance state (LRS). Through time-domain and temperature dependent analysis, we show that the RTN effect shares the same origin …

An oxide memristor device changes its internal state according to the history of the applied voltage and current. The principle of resistive switching (RS) is based on ion transport ( e.g. , oxygen vacancy redistribution). To date, devices with bi-, triple-, or even quadruple-layered structures have been studied to achieve the desired switching behavior through device structure optimization. In contrast, the device performance can also be tuned through fundamental atomic-level design of the switching materials, which can directly affect the dynamic transport of ions and lead to optimized switching characteristics. Here, we show that doping tantalum oxide memristors with silicon atoms can facilitate oxygen vacancy formation and transport in the switching layer with adjustable ion hopping distance and drift velocity. The devices show larger dynamic ranges with easier access to the intermediate states while maintaining the …

With the increasing utilisation of artificial intelligence, there is a renewed demand for the development of novel neuromorphic computing owing to the drawbacks of the existing computing paradigm based on the von Neumann architecture. Extensive studies have been performed on memristors as their electrical nature is similar to those of biological synapses and neurons. However, most hardware-based artificial neural networks (ANNs) have been developed with oxide-based memristors owing to their high compatibility with mature complementary metal–oxide–semiconductor (CMOS) processes. Considering the advantages of conductive-bridging random-access memories (CBRAMs), such as their high scalability, high on–off current with a wide dynamic range, and low off-current, over oxide-based memristors, extensive studies on CBRAMs are required. In this review, the basics of operation of CBRAMs are …

Resistive switching devices (RRAMs) have been proposed a promising candidate for future memory and neuromorphic applications. Central to the successful application of these emerging devices is the understanding of the resistance switching and failure mechanism, and identification of key physical parameters that will enable continued device optimization. In this study, we report detailed retention analysis of a TaO x based RRAM at high temperatures and the development of a microscopic oxygen diffusion model that fully explains the experimental results and can be used to guide future device developments. The device conductance in low resistance state (LRS) was constantly monitored at several elevated temperatures (above 300 C), and an initial gradual conductivity drift followed by a sudden conductance drop were observed during retention failure. These observations were explained by a microscopic …

Very recently, stacked two-dimensional materials have been studied, focusing on the van der Waals interaction at their stack junction interface. Here, we report field effect transistors (FETs) with stacked transition metal dichalcogenide (TMD) channels, where the heterojunction interface between two TMDs appears useful for nonvolatile or neuromorphic memory FETs. A few nanometer-thin WSe 2 and MoTe 2 flakes are vertically stacked on the gate dielectric, and bottom p- MoTe 2 performs as a channel for hole transport. Interestingly, the WSe 2 /MoTe 2 stack interface functions as a hole trapping site where traps behave in a nonvolatile manner, although trapping/detrapping can be controlled by gate voltage ( V GS ). Memory retention after high V GS pulse appears longer than 10000 s, and the Program/Erase ratio in a drain current is higher than 200. Moreover, the traps are delicately controllable even with small V GS …

Neuromorphic computing, an alternative for von Neumann architecture, requires synapse devices where the data can be stored and computed in the same place. The three-terminal synapse device is attractive for neuromorphic computing due to its high stability and controllability. However, high nonlinearity on weight update, low dynamic range, and incompatibility with conventional CMOS systems have been reported as obstacles for large-scale crossbar arrays. Here, we propose the CMOS compatible gate injection-based field-effect transistor employing thermionic emission to enhance the linear conductance update. The dependence of the linearity on the conduction mechanism is examined by inserting an interfacial layer in the gate stack. To demonstrate the conduction mechanism, the gate current measurement is conducted under varying temperatures. The device based on thermionic emission achieves …

A memristive crossbar array (MCA) is an ideal platform for emerging memory and neuromorphic hardware due to its high bitwise density capability. A charge trap memristor (CTM) is an attractive candidate for the memristor cell of the MCA, because the embodied rectifying characteristic frees it from the sneak current issue. Although the potential of the CTM devices has been suggested, their practical viability needs to be further proved. Here, a Pt/Ta 2 O 5 /Nb 2 O 5‐ x /Al 2 O 3‐ y /Ti CTM stack exhibiting high retention and array‐level uniformity is proposed, allowing a highly reliable selector‐less MCA. It shows high self‐rectifying and nonlinear current‐voltage characteristics below 1 µA of programming current with a continuous analog switching behavior. Also, its retention is longer than 10 5 s at 150 °C, suggesting the device is highly stable for non‐volatile analog applications. A plausible band diagram model is proposed …

Conductive-bridging random access memory (CBRAM) has garnered attention as a building block of non–von Neumann architectures because of scalability and parallel processing on the crossbar array. To integrate CBRAM into the back-end-of-line (BEOL) process, amorphous switching materials have been investigated for practical usage. However, both the inherent randomness of filaments and disorders of amorphous material lead to poor reliability. In this study, a highly reliable nanoporous–defective bottom layer (NP–DBL) structure based on amorphous TiO 2 is demonstrated (Ag/a-TiO 2 /a-TiO x /p-Si). The stoichiometries of DBL and the pore size can be manipulated to achieve the analog conductance updates and multilevel conductance by 300 states with 1.3% variation, and 10 levels, respectively. Compared with nonporous TiO 2 CBRAM, endurance, retention, and uniformity can be improved by 10 6 pulses …

Next-generation wireless communication such as sixth-generation (6G) and beyond is expected to require high-frequency, multifunctionality, and power-efficiency systems. A III–V compound semiconductor is a promising technology for high-frequency applications, and a Si complementary metal-oxide-semiconductor (CMOS) is the never-beaten technology for highly integrated digital circuits. To harness the advantages of these two technologies, monolithic integration of III–V and Si electronics is beneficial, so that there have been everlasting efforts to accomplish the monolithic integration. Considering that the on horizon 6G wireless communication requires faster and more energy-efficient system-on-chip technologies, it is imperative to realize a radio frequency (RF) system in which III–V technology and Si CMOS technology are integrated at a device level. Here we report heterogeneous and monolithic three …

Emerging Nanoelectronic Technology and Integrated Systems Lab

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Semiconductor-related research and education at KAIST

Experimental demonstration of third-order memristor-based artificial sensory nervous system for neuro-inspired robotics

Decoupling strategy to separate training andinference withthree-dimensional neuromorphic hardware composed of neurons and hybrid synapses

연구실 보유 특허

대학별 입시끈

우리 연구실 모집

교수님 소개

최신현

연구실 키워드

알럼나이가 간 회사

연구실 지원 방법

대우 조건

연도별 논문 인용수

저널 & 학회 논문 출판 수

연구실 논문 목록

Semiconductor-related research and education at KAIST

Experimental demonstration of third-order memristor-based artificial sensory nervous system for neuro-inspired robotics

Decoupling strategy to separate training andinference withthree-dimensional neuromorphic hardware composed of neurons and hybrid synapses

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