CAD & SoC Design Lab

연구실 소개

The CAD and SoC Design Laboratory (CSDL) was established in 1989 by Professor Younghwan Kim. The main research topics in CSDL are SoC design, hardware/software codesign, low-power design, design methodology and image processing. Recently, we are focusing on AI-based EDA (electronic design automation), and AI-hardware design. The lab focuses on system-on-chip (SoC) design, CAD, and deep learning accelerator research. The research aims to optimize system semiconductor design through (i) deep learning-based semiconductor design automation and (ii) deep learning accelerator design.