Seung-Beom Ku

Han-Sol Lee

Kyeongho Eom

Minseong Um

Hyun-Su Lee

Hongseok Kim

Hanjun Cho

Woojoong Jung

Junyeol An

Junho Song

Minju Park

Jisan Ahn

Jungmin Kim

Chaehyun Kim

Sangil Lee

Minjae Kim

Duckhoon Ro

Kyungsoo Jeong

Our research spans a broad range of advanced systems from analog / mixed-signal integrated circuit (IC) design to emerging microsystem applications. We especially focus on biomedical / sensor / power / display / neuromorphic systems that need miniaturized low-power high-performance IC solutions for efficient and effective sensing, processing, interfacing, and powering.

본 연구는 아날로그/혼합 신호 집적 회로(IC) 설계에서부터 새로운 마이크로시스템 응용 분야에 이르기까지 광범위한 고급 시스템을 다룹니다. 특히 효율적이고 효과적인 감지, 처리, 인터페이스 및 전력 공급을 위해 소형화된 저전력 고성능 IC 솔루션이 필요한 생물 의학/센서/전력/디스플레이/뉴로모픽 시스템에 중점을 둡니다.

Energy-Management Integrated Circuit Design for Wireless Power and Data Transfer Applications

Wireless Applications: Biomedical Signals Telemetry System

Energy Management Integrated Circuits for Wireless Power Transmission

An Area and Power Efficient Fully Nonlinear 10-bit Column Driver with Time-Shared Multi-Gamma-Slope DAC and Time-Interleaved Sampling Buffer for Mobile AMOLED Displays

A Fully Integrated Portable Microplastic Detection System-on-Chip with High-Sensitivity RF MEMS Sensors and Narrow-Band Notch-Tracking Dielectric Discrimination Algorithms

Data-Driven Machine Learning Models for Predicting Engineering Properties in Deep-Sea Sediments

A Three-dimensional Bipolar Microneedle Electrode Array with Local Ground Integrated at Each Sidewall for Enhanced Focal Electric Stimulation

A Compact and Power Efficient 10 Bit Source Driver IC with Low Voltage Gamma Slope DAC for Mobile OLED Displays

A Hybrid Bidirectional Converter with Always-Half-Inductor Current Using Adaptive Target Current Tracking for USB-to-2-Cell Applications

A 96.5% Efficiency Hybrid Step-Up Converter with Low Input-Level Voltage Stress and Duty-Independent Constant Inductor Current

Spike-Based Q-learning in a Non-von Neumann Architecture

CMOS LIF Neurons with Local Membrane Dynamic Biasing Based on Reciprocal Inhibition for Self-Oscillatory Neural Networks

A Real-Time Error-Compensated Multisensor Acquisition System for Marine Geotechnical Investigation

An Analog Neuromorphic On-Chip Training System with IGZO TFT-Based 6T1C Synaptic Memory

An Area and Power Efficient Source Driver IC with Multi-Line Sensing Real-Time Pixel Compensation for OLED Displays

A Reconfigurable 3-Level Buck Converter with Supply Voltage Dynamic Split for Loop-Free Rapid VCF-Balancing and Dead-Zone Seamless Transition

Emerging Neuromorphic Devices-Compatible SNN Hardware with Adaptive STDP and Validation Using Novel CMOS Neuron-Synapse Circuits

A 10-V-Tolerant Dual-Mode Neural Stimulation System with Self-Sustaining Dynamic Supply and Error-Resilient Digital Stimulus Odometer

A Single-Input Multi-Output Resonant Regulating Rectifier Generating Three Outputs in a Half Cycle for Wirelessly Powered Biomedical Devices

Design Strategies of Capacitor-Based Synaptic Cell for High-Efficiency Analog Neural Network Training

A Multi-bit ECRAM-Based Analog Neuromorphic System with High-Precision Current Readout Achieving 97.3% Inference Accuracy

A 13.56-MHz 93.5%-Efficiency Optimal On/Off Timing Tracking Active Rectifier with Digital Feedback-Based Adaptive Delay Control

Enhanced Optogenetic Stimulation of Retinal Ganglion Cells with Assistive Electric Stimulation for Low Optical Power Artificial Vision

An RF MEMS Sensor Driver/Readout SoC with Resonant Frequency Shift and Closed-Loop Envelope Regulation for Portable Microplastic Detection

A Power-Efficient Envelope-Detector-Less Amplitude-Shift-Keying Forward Telemetry for Wirelessly Powered Biomedical Devices

A Scalable Distributed Linear Regulator with 99.5%-Accuracy Replica-based Current Sharing Calibration for Automotive Applications

An Energy-Efficient Real-Time Wearable ECG Acquisition System with Near-Data Prediagnosis for Mobile Applications

Development of Ocular Muscle Stimulation Systems and Optimization of Electrical Stimulus Parameters for Paralytic Strabismus Treatment

Verification of Neuromorphic Processing Accuracy against Non-Ideal Errors in Synapse-based Neural Network Systems

Quantitative Analyses of How Optimally Heterogeneous Neural Codes Maximize Neural Information in Jittery Transmission Environments

An Average Amplitude Regulation Scheme for Ambient Illuminance Adaptation in Retinal Prosthesis

A 92.7%-Efficiency 6.78-MHz Energy-Resuscitating Resonant Regulating Rectifier with Dual Outputs for Wirelessly Powered Devices

Retention-Aware Zero-Shifting Technique for Tiki-Taka Algorithm-Based Analog Deep Learning Accelerator

A 94.9% Efficiency Always-Power-Delivered SIDO Buck Converter with Continuous Current Balancing and Complementary Adaptive-Switching Regulation

A 96.3%-Efficiency Wide-Voltage-Range Three-Level Boost Converter with Loop-Free Self-Balancing and Dead-Zone PWM Control for Backlight LED Drivers

A 92%-Efficiency Inductor-Charging Switched-Capacitor Stimulation System with Level-Adaptive Duty Modulation and Offset Charge Balancing

Localization of hyperpolarization-activated cyclic nucleotide-gated channels in the vertebrate retinas across species and their physiological roles

A 9-V-Tolerant Stacked-Switched-Capacitor Stimulation System with Level-Adaptive Switch Control and Rapid Stimulus-Synchronized Charge Balancing for Implantable Devices

A 95.4% Hybrid Always-Dual-Path Recursive Step-Down Converter Using Adaptive Switching Level Control with 288mΩ Large-DCR Inductor

Rowhammer Attacks in Dynamic Random-Access Memory and Defense Methods

A Low-Stimulus-Scattering Pixel-Sharing Sub-Retinal Prosthesis SoC with Time-Based Photodiode Sensing and Per-Pixel Dynamic Voltage Scaling

Security Problems of Latest FPGAs and Reverse Engineering Methods of Xilinx 7-series FPGAs

Device-Algorithm Co-Optimization for an On-Chip Trainable Capacitor-Based Synaptic Device with IGZO TFT and Retention-Centric Tiki-Taka Algorithm

A Wide-Load-Range and High-Slew Capacitor-Less NMOS LDO with Adaptive-Gain Nested Miller Compensation and Pre-Emphasis Inverse Biasing

Complementary Multisplit Ring Resonant MEMS Sensor With Microfilter for Microplastics Concentration Measurement

A High-Efficiency High-Voltage-Tolerant Buck Converter with Inductor Current Emulator for Battery-Powered IoT Devices

A Multi-channel Neural Recording System with Neural Spike Scan and Adaptive Electrode Selection for High-density Neural Interface

A Fault-Tolerant Current-Starved Ring Oscillator with Signal-Flip Protection Delay Cells against Radiation Effects

A 13.56-MHz Wireless Power and Data Transfer System with Current-Modulated Energy-Reuse Back Telemetry and Energy-Adaptive Voltage Regulation

A 0.3V-V IN, 0.015ps-FoM Fully Integrated Analog-Assisted Digital LDO with Dual-Negative Gate Control and Adaptive Transient Recovery Path

A Load-Insensitive Hybrid LSK Back Telemetry System with Slope-Based Demodulation for Inductively Powered Biomedical Devices

High-Density Neural Recording System Design

A 80x60 Microbolometer CMOS Thermal Imager Integrated With a Low-Noise 12-B DAC

A Power-Efficient Resonant Current Mode Receiver with Wide Input Range over Breakdown Voltages Using Automated Maximum Efficiency Control

A Soft-Error-Tolerant SAR ADC with Dual-Capacitor Sample-and-Hold Control for Sensor Systems

Multi Look-up Table FPGA Reverse Engineering with Bitstream Extraction and Multiple PIP/PLP Matching

Dual-Path Three-Level Buck Converter with Loop-Free Auto-Calibration for Flying Capacitor Self-Balancing

Triple-Mode Switched-Inductor-Capacitor DC-DC Buck Converter with Reusable Flying Capacitor and Bang-Bang Zero-Current Detector for Wide Load Current Range

High Efficiency Hybrid Dual-Path Step-Up DC-DC Converter with Continuous Output Delivery Current for Low Output Ripple

A Time-Interleaved Resonant Voltage Mode Wireless Power Receiver with Delay-Based Tracking Loops for Implantable Medical Devices

On-Chip Compensated Type-III Buck Converter Using an Inner Feedback Loop with a Seamless CCM/DCM Transition Technique

A Radiation-Hardened SAR ADC with Delay-Based Dual Feedback Flip-Flops for Sensor Systems

A 90.7%-Efficiency Hybrid Optogenetic Stimulation System with Sub-Threshold Electrical Stimuli Achieving 70.6% Optical Energy Saving

An 80×80μm2/Pixel 55.48dB-Wide-DR 400-Pixel Subretinal Prosthesis SoC with Power-Aware Light Adaptation and Charge-Recycling Local Dynamic Supply

A 96.6% Single-Mode Hybrid Dual-Path Buck-Boost Converter with Conduction Loss Reduction through Conversion-Ratio-Based Adaptive 3-Phase Control

Wireless biphasic silicon solar cell retinal prosthesis with a push-pull mechanism for enhanced focal stimulation and charge balance

First M3D-Integrated 4K ECRAM Chip with Sub-100 nm Channels Achieving 100% Yield and Highly Uniform Performance for Analog AI Computing

A 97% Peak-Efficiency Dual-Channel 3-Fine-Level Buck-Boost Converter with Capacitive Inrush Current Reduction and Seamless Mode Transition Using a Slim 0.65-Thickness Inductor

A Reconfigurable Multi-Level AC-DC/DC-DC Ocean Energy Harvester IC Achieving 77.7% End-to-End Power Efficiency for Triboelectric Nanogenerators

A Hybrid Touch Sensing AFE with Common-CVQ (Currents, Voltages, and Charges) Subtraction to Improve Display Noise Immunity for Large Sensing Load up to 820pF

An Inductor-First Hybrid Buck-Boost Converter Featuring Seamless Single-Mode Operation, 97.2% Peak Efficiency, and 565mA/mm3 Current Density with Ultra-Compact 1mm3-Volume Inductor

A 97.4%-Peak-Efficiency Always-Half-Inductor-Current Hybrid Bidirectional Converter with Adaptive Target Current Tracking for USB-to-2-Cell Bidirectional Power Transfer

A Real-Time Pixel-Compensated Source Driver IC with Dual Slope Error Detection and Multi-Channel Time-Multiplexing Compensator for Compact OLED Displays

A Compact 10b Source Driver IC with Sigma-Delta Pulse Width Modulation for Low-Voltage Digital Interpolation Achieving 1884µm²/Channel

Efficiency of Combined Optogenetic and Electric Stimulation Depending on Amplitude and Waveform of Electric Stimulation in Mouse Retina

Adaptive SNN Neuromorphic Hardware for Interfacing between Emerging Neuron and Synaptic Devices

A Novel Invasive Biosensor Sensor Module Integrating Multi-Sensors and Readout IC for Enhanced Convenience in Daily Life Biomonitoring

A Fully Integrated Microplastic Detection SoC with 0.1–3 GHz Bandwidth and 35 dB Dynamic Range for Narrow-Band Notch RF MEMS Sensor System

An Analog Neuromorphic On-Chip Training System with IGZO TFT-Based 6T1C 367-State Synaptic Memory Achieving 0.99-R2 Linearity and 104-Times Enhanced Retention Time

A 90.8%-Efficiency SIMO Resonant Regulating Rectifier Generating 3 Outputs in a Half Cycle with Distributed Multi-Phase Control for Wirelessly-Powered Implantable Devices

A 96.5% Peak Efficiency Duty-Independent DC-DC Step-Up Converter with Low Input-Level Voltage Stress and Mode-Adaptive Inductor Current Reduction

A Fully Nonlinear Compact 10b Source Driver with Low-Voltage Gamma Slope DAC and Data/Phase Dependent Current Modulation Achieving 2411µm²/Channel for Mobile OLED Displays

Noise Immunity in Capacitive Sensing: Single-Ended AFE Design with Common-Current Subtraction for Mutual- and Self-Capacitance Sensing in 390pF Load

An Area and Power Efficient Fully Nonlinear 10-bit Column Driver with Time-Shared Multi-Gamma-Slope DAC and Time-Interleaved Sampling Buffer for Mobile AMOLEDs

A 92.7%-Efficiency 6.78-MHz Dual-Output Energy-Resuscitating Resonant Regulating Rectifier for Wirelessly Powered Systems

An ECRAM-Based Analog Compute-in-Memory Neuromorphic System with High-Precision Current Readout for Deep Learning

CMOS Leaky Integrate-and-Fire Neurons with Local Dynamic Biasing and Inhibitory Self-Oscillation

An RF MEMS Sensor Driver/Readout SoC with Resonant Frequency Shift and Closed-Loop Envelope Regulation for Microplastic Detection

A 93.5%-Efficiency 13.56-MHz-Bandwidth Optimal On/Off Tracking Active Rectifier with Fully Digital Feedback-Based Delay Control for Adaptive Efficiency Compensation

A 9V-Tolerant 71.4%-Efficiency Stacked-Switched-Capacitor Stimulation System with Level-Adaptive Switching Control and Rapid Stimulus-Synchronized Charge Balancing

A Stimulus-Scattering-Free Pixel-Sharing Sub-Retinal Prosthesis SoC with 35.8dB Dynamic Range Time-Based Photodiode Sensing and Per-Pixel Dynamic Voltage Scaling

A Fast-Transient and Wide-Range Output Capacitor-Less NMOS LDO Regulator with Adaptive-Gain Nested Miller Compensation and Pre-Emphasis Inverse Biasing

A Circuit Modeling Method of OLED On-Cell Touch Panels Including the Touch Objects for Full-Frame Touch Simulation

Implementation of Full-Panel Circuit Models for Interference Estimation Between Touch and Display Operation in On-Cell Touch AMOLED

A Hybrid Always-Dual-Path Recursive Step-Down Converter Using Adaptive Switching Level Control Achieving 95.4% Efficiency with 288mΩ Large-DCR Inductor

A 92%-Efficiency Inductor-Charging Switched-Capacitor Stimulation System with Level-Adaptive Duty Modulation and Offset Charge Balancing for Muscular Stimulation

Carbon Black based Resistive Strain Gauge Sensor for Penile Measurement

A Load-Insensitive Hybrid Back Telemetry System for Wirelessly-Powered Implantable Devices

A 2.45-GHz RF Energy Harvester with On-Chip 8-VCR SC Booster for IoT Devices

An inductively powered scalable 32-channel wireless neural recording system-on-a-chip for neuroscience applications

An integrated power-efficient active rectifier with offset-controlled high speed comparators for inductively powered applications

A power-efficient wireless system with adaptive supply control for deep brain stimulation

A Power-Efficient Switched-Capacitor Stimulating System for Electrical/Optical Deep Brain Stimulation

16.7 An adaptive reconfigurable active voltage doubler/rectifier for extended-range inductive power transmission

A wireless magnetoresistive sensing system for an intraoral tongue-computer interface

Design, fabrication, and packaging of an integrated, wirelessly-powered optrode array for optogenetics application

Analog CMOS-based resistive processing unit for deep neural network training

A high frequency active voltage doubler in standard CMOS using offset-controlled comparators for inductive power transmission

High-efficiency hybrid dual-path step-up DC–DC converter with continuous output-current delivery for low output voltage ripple

Recent advances in FPGA reverse engineering

A wireless slanted optrode array with integrated micro leds for optogenetics

A Power-Efficient Wireless Capacitor Charging System Through an Inductive Link

A 95.2% efficiency dual-path DC-DC step-up converter with continuous output current delivery and low voltage ripple

Dual-path three-level buck converter with loop-free autocalibration for flying capacitor self-balancing

A Noninverting Buck–Boost Converter With State-Based Current Control for Li-ion Battery Management in Mobile Applications

A 97% high-efficiency 6μs fast-recovery-time buck-based step-up/down converter with embedded 1/2 and 3/2 charge-pumps for li-lon battery management

Circuit methodology for highly linear and symmetric resistive processing unit

A Piecewise Linear 10 Bit DAC Architecture With Drain Current Modulation for Compact LCD Driver ICs

Maysam Ghovanloo

Gyu-Hyeong Cho

Yong-Joon Jeon

Hangue Park

Seyoung Kim

Se-Un Shin

Tayfun Gokmen

Wen Li

Ki Yong Kwon

Minsu Kim

Mehdi Kiani

Seung Hun Choi

Seungchul Jung

Jinyong Jeon

Taehwang Kong

Hyung-Min Lee

We present an inductively powered 32-channel wireless integrated neural recording (WINeR) system-on-a-chip (SoC) to be ultimately used for one or more small freely behaving animals. The inductive powering is intended to relieve the animals from carrying bulky batteries used in other wireless systems, and enables long recording sessions. The WINeR system uses time-division multiplexing along with a novel power scheduling method that reduces the current in unused low-noise amplifiers (LNAs) to cut the total SoC power consumption. In addition, an on-chip high-efficiency active rectifier with optimized coils help improve the overall system power efficiency, which is controlled in a closed loop to supply stable power to the WINeR regardless of the coil displacements. The WINeR SoC has been implemented in a 0.5-μ m standard complementary metal-oxide semiconductor process, measuring 4.9×3.3 mm 2 and …

We present an active full-wave rectifier with offset-controlled high speed comparators in standard CMOS that provides high power conversion efficiency (PCE) in high frequency (HF) range for inductively powered devices. This rectifier provides much lower dropout voltage and far better PCE compared to the passive on-chip or off-chip rectifiers. The built-in offset-control functions in the comparators compensate for both turn-on and turn-off delays in the main rectifying switches, thus maximizing the forward current delivered to the load and minimizing the back current to improve the PCE. We have fabricated this active rectifier in a 0.5-μm 3M2P standard CMOS process, occupying 0.18 mm 2 of chip area. With 3.8 V peak ac input at 13.56 MHz, the rectifier provides 3.12 V dc output to a 500 Ω load, resulting in the PCE of 80.2%, which is the highest measured at this frequency. In addition, overvoltage protection (OVP) as …

A power-efficient wireless stimulating system for a head-mounted deep brain stimulator (DBS) is presented. A new adaptive rectifier generates a variable DC supply voltage from a constant AC power carrier utilizing phase control feedback, while achieving high AC-DC power conversion efficiency (PCE) through active synchronous switching. A current-controlled stimulator adopts closed-loop supply control to automatically adjust the stimulation compliance voltage by detecting stimulation site potentials through a voltage readout channel, and improve the stimulation efficiency. The stimulator also utilizes closed-loop active charge balancing to maintain the residual charge at each site within a safe limit, while receiving the stimulation parameters wirelessly from the amplitude-shift-keyed power carrier. A 4-ch wireless stimulating system prototype was fabricated in a 0.5-μm 3M2P standard CMOS process, occupying 2 …

A power-efficient wireless switched-capacitor based stimulating (SCS) system for electrical/optical deep brain stimulation (DBS) is presented. The SCS system efficiently charges storage capacitors directly from an inductive link and delivers accurately balanced charge to the tissue, improving the overall stimulator efficiency. In addition, the decaying exponential stimulus pulses generated by SCS can be more effective than conventional rectangular and ramp stimuli in activating neural tissue when consuming the same amount of energy, leading to higher stimulus efficacy. A 4-channel wireless SCS system in 0.35 μm CMOS process achieves stimulator efficiency of 80.4% with capacitor pairs charged to ±2V, while the decaying exponential stimulus requires equal or less stimulus energy and injected charge than other stimuli depending on pulse width to activate the same tissue area. The SCS system has also been …

We present an adaptive reconfigurable active voltage doubler (VD)/rectifier (REC) (VD/REC) in standard CMOS, which can adaptively change its topology to either a VD or a REC by sensing the output voltage, leading to more robust inductive power transmission over an extended range. Both active VD and REC modes provide much lower dropout voltage and far better power conversion efficiency (PCE) compared to their passive counterparts by adopting offset-controlled high-speed comparators that drive the rectifying switches at proper times in the high-frequency band. We have fabricated the active VD/REC in a 0.5- 3-metal 2-poly CMOS process, occupying 0.585 of chip area. In an exemplar setup, VD/REC extended the power transmission range by 33 (from 6 to 8 cm) in relative coil distance and 41.5 (from 53 to 75 ) in relative coil orientation compared to using the REC alone. While providing 3.1-V dc output …

Tongue drive system (TDS) is a tongue-operated, minimally invasive, unobtrusive, and wireless assistive technology (AT) that infers users' intentions by detecting their voluntary tongue motion and translating them into user-defined commands. Here we present the new intraoral version of the TDS (iTDS), which has been implemented in the form of a dental retainer. The iTDS system-on-a-chip (SoC) features a configurable analog front-end (AFE) that reads the magnetic field variations inside the mouth from four 3-axial magnetoresistive sensors located at four corners of the iTDS printed circuit board (PCB). A dual-band transmitter (Tx) on the same chip operates at 27 and 432 MHz in the Industrial/Scientific/Medical (ISM) band to allow users to switch in the presence of external interference. The Tx streams the digitized samples to a custom-designed TDS universal interface, built from commercial off-the-shelf (COTS …

The recent development of optogenetics has created an increased demand for advancing engineering tools for optical modulation of neural circuitry. This paper details the design, fabrication, integration, and packaging procedures of a wirelessly-powered, light emitting diode (LED) coupled optrode neural interface for optogenetic studies. The LED-coupled optrode array employs microscale LED (μLED) chips and polymer-based microwaveguides to deliver light into multi-level cortical networks, coupled with microelectrodes to record spontaneous changes in neural activity. An integrated, implantable, switched-capacitor based stimulator (SCS) system provides high instantaneous power to the μLEDs through an inductive link to emit sufficient light and evoke neural activities. The presented system is mechanically flexible, biocompatible, miniaturized, and lightweight, suitable for chronic implantation in small freely behaving animals. The design of this system is scalable and its manufacturing is cost effective through batch fabrication using microelectromechanical systems (MEMS) technology. It can be adopted by other groups and customized for specific needs of individual experiments.

Recently we have shown that an architecture based on resistive processing unit (RPU) devices has potential to achieve significant acceleration in deep neural network (DNN) training compared to today's software-based DNN implementations running on CPU/GPU. However, currently available device candidates based on non-volatile memory technologies do not satisfy all the requirements to realize the RPU concept. Here, we propose an analog CMOS-based RPU design (CMOS RPU) which can store and process data locally and can be operated in a massively parallel manner. We analyze various properties of the CMOS RPU to evaluate the functionality and feasibility for acceleration of DNN training.

In this paper, we present a fully integrated active voltage doubler in CMOS technology using offset-controlled high speed comparators for extending the range of inductive power transmission to implantable microelectronic devices (IMD) and radio-frequency identification (RFID) tags. This active voltage doubler provides considerably higher power conversion efficiency (PCE) and lower dropout voltage compared to its passive counterpart and requires lower input voltage than active rectifiers, leading to reliable and efficient operation with weakly coupled inductive links. The offset-controlled functions in the comparators compensate for turn-on and turn-off delays to not only maximize the forward charging current to the load but also minimize the back current, optimizing PCE in the high frequency (HF) band. We fabricated the active voltage doubler in a 0.5- 3M2P std . CMOS process, occupying 0.144 of chip area. With 1 …

This article proposes a new boost converter topology called dual-path step-up dc-dc converter (DPUC). Unlike the conventional boost converter (CBC), the DPUC has a hybrid structure using one inductor and one flying capacitor to make dual current delivery paths. This allows continuous current delivering to the output, reducing both the dc level of the inductor current and the output voltage ripple. Therefore, the DPUC has higher efficiency and smaller output voltage ripple than those of the CBC. In addition, the feedforward characteristic of the flying capacitor can alleviate the effect of right-half-plane zero that degrades the transient response. Even with the inductor dc resistance of 200 mΩ, the DPUC achieves a high efficiency of 95.2% and a small ripple of up to 15 mV.

In this paper, we review recent advances in reverse engineering with an emphasis on FPGA devices and experimentally verified advantages and limitations of reverse engineering tools. The paper first introduces essential components for programming Xilinx FPGAs (Xilinx, San Jose, CA, USA), such as Xilinx Design Language (XDL), XDL Report (XDLRC), and bitstream. Then, reverse engineering tools (Debit, BIL, and Bit2ncd), which extract the bitstream from the external memory to the FPGA and utilize it to recover the netlist, are reviewed, and their limitations are discussed. This paper also covers supplementary tools (Rapidsmith) that can adjust the FPGA design flow to support reverse engineering. Finally, reverse engineering projects for non-Xilinx products, such as Lattice FPGAs (Icestorm) and Altera FPGAs (QUIP), are introduced to compare the reverse engineering capabilities by various commercial FPGA products.

This paper presents a wireless-enabled, flexible optrode array with multichannel micro light-emitting diodes (μ-LEDs) for bi-directional wireless neural interface. The array integrates wirelessly addressable μ-LED chips with a slanted polymer optrode array for precise light delivery and neural recording at multiple cortical layers simultaneously. A droplet backside exposure (DBE) method was developed to monolithically fabricate varying-length optrodes on a single polymer platform. In vivo tests in rat brains demonstrated that the μ-LEDs were inductively powered and controlled using a wireless switched-capacitor stimulator (SCS), and light-induced neural activity was recorded with the optrode array concurrently.

A power-efficient wireless capacitor charging system for inductively powered applications has been presented. A bank of capacitors can be directly charged from an ac source by generating a current through a series charge injection capacitor and a capacitor charger circuit. The fixed charging current reduces energy loss in switches, while maximizing the charging efficiency. An adaptive capacitor tuner compensates for the resonant capacitance variations during charging to keep the amplitude of the ac input voltage at its peak. We have fabricated the capacitor charging system prototype in a 0.35-μm 4-metal 2-poly standard CMOS process in 2.1 mm 2 of chip area. It can charge four pairs of capacitors sequentially. While receiving 2.7-V peak ac input through a 2-MHz inductive link, the capacitor charging system can charge each pair of 1 μF capacitors up to ±2 V in 420 μs, achieving a high measured charging …

DC-DC boost converters are widely used to increase the supply voltage in various applications, including LED drivers, energy harvesting, etc. [1-5]. The conventional boost converter (CBC) is shown in Fig. 27.5.1, where the switches S 1 and S 2 are turned on and off alternately at φ 1 and φ 2 , respectively, and the inductor current (I L ) is built up and delivered to the output. There are some critical issues in CBC because the output delivery current (I S ) is not continuous. As a result, the I L can be much larger than the load current (I LOAD ) as φ 1 becomes longer. Since a bulky-size inductor having a low parasitic DC resistance (R dcr ) is not usable for mobile applications with a strictly limited space, this large I L results in significant conduction loss in the large R DCR of a small-size inductor. Another issue is that the discontinuous I S in φ 2 causes large voltage ripple (AV OUT ) at the output. Moreover, switching spike voltages …

This letter proposes a loop-free autocalibration technique for self-balancing of flying capacitors in a three-level dc–dc buck converter. The proposed converter utilizes a dual-path power stage with balancing switches that adaptively short flying capacitors at de-energizing phases. Thus, the dual-path three-level converter ensures that flying capacitor voltages are self-balanced at half the input voltage without using additional feedback calibration loops, leading to robust operation and competitive efficiencies. The prototype was fabricated in the 0.13- μ m CMOS BCD process and adopted two flying capacitors of 4.7 μ F each and an inductor of 10 μ H with a dc resistance of 128 mΩ. When an 8-V input was converted to a 3-V output voltage with a load current of 400 mA, the measured efficiency was 88.6% at 800 kHz switching while flying capacitors are automatically balanced.

In this letter, a noninverting buck-boost converter with state-based current control is proposed for Li-ion battery management. Unlike conventional multimode control in buck-boost converters, our control scheme utilizes a state controller with a single-level error current and a state checking clock to define the operation mode at every cycle. The state-based buck-boost converter enables seamless mode transition and stable output regulation with fixed interleaving patterns even when input and output voltages are similar, ensuring robust mode change with inherent hysteresis. The prototype IC was fabricated in a 0.18-μm BCD process and achieved 90.9% efficiency with 1.1-A maximum load current capability at 1-MHz switching frequency.

Lithium-ion batteries are generally used in mobile devices, but the voltage range of the battery varies from 2.7 to 4.2V. To provide a mid-3V-range output from the battery, a converter capable of step-up/down-conversion is necessary. For this purpose, non-inverting buck-boost topologies with multimode control [1-3] have been widely used. However, they have limited efficiency slightly higher than 90%, which comes from the fact that a main current path always encompasses two switches. To increase the efficiency in the buck mode where the converter operates for most of the usage time, a flying capacitor buck-boost (FCBB) was proposed in [4]. Despite its high power efficiency, it requires large-size LDMOS to endure a large voltage range up to 8V at switching node, resulting in cost inefficiency. Since all these topologies have a common controller that covers both buck and boost modes of operation, compensator …

ABSTRACT A resistive processing unit (RPU) includes a circuit includ ing at least two current mirrors connected in series, and a capacitor connected with the at least two current mirrors, the capacitor providing a weight based on a charge level of the capacitor. The capacitor is charged or discharged by one of the at least two current mirrors.

A piecewise linear 10 bit DAC for LCD data driver with robust interpolation method of drain current modulation is presented. It has higher effective bit resolution than the linear 10 bit switched-capacitor DAC when applied to nonlinear liquid crystal characteristics. By adopting a simultaneous design flow based on the estimations for the mismatch and nonlinearity effects on channel driver performance, the proposed DAC accomplishes good DNL of 0.37 LSB and excellent channel uniformity such that the mean and the standard deviation of the maximum output voltage deviations are 6.35 mV and 0.54 mV, respectively. The data driver with the new interpolation shows 8.2% shrinkage of chip area in comparison with the conventional 8 bit data driver with R-DAC.

Ph.D. in Electrical and Computer Engineering

Professor, School of Electrical Engineering

Professor

2018 Korean society for the study of obesity guideline for the management of obesity in Korea

In Vivo Biodistribution and Toxicology of Carboxylated Graphene Quantum Dots

Hybrid exosomes, exosome-like nanovesicles and engineered exosomes for therapeutic applications

2014 clinical practice guidelines for overweight and obesity in Korea

Electrospinning nanofibers for therapeutics delivery

Association between cigarette smoking and metabolic syndrome: the Korea National Health and Nutrition Examination Survey

Blood compatible graphene/heparin conjugate through noncovalent chemistry

Recent advances in application of biosensors in tissue engineering

Amphiphilic polysaccharide derivatives

Bioapplication of graphene oxide derivatives: drug/gene delivery, imaging, polymeric modification, toxicology, therapeutics and challenges

Surface coating of graphene quantum dots using mussel-inspired polydopamine for biomedical optical imaging

Transfusion transmission of retroviruses: human T‐lymphotropic virus types I and II compared with human immunodeficiency virus type 1

Targeted near-IR QDs-loaded micelles for cancer therapy and imaging

Photoluminescent graphene nanoparticles for cancer phototherapy and imaging

Cancer cell-specific photoactivity of pheophorbide a–glycol chitosan nanoparticles for photodynamic therapy in tumor-bearing mice

A hyaluronic acid nanogel for photo–chemo theranostics of lung cancer with simultaneous light-responsive controlled release of doxorubicin

Conjugation of low-molecular-weight heparin and deoxycholic acid for the development of a new oral anticoagulant agent

Near infra-red photoluminescent graphene nanoparticles greatly expand their use in noninvasive biomedical imaging

Human immunodeficiency virus type 1 infection: relationship of risk group and age to rate of progression to AIDS

Graphene quantum dot-based theranostic agents for active targeting of breast cancer

Md Nurunnabi

Zehedina Khatun, PhD

Obesity increases the risks of diabetes, hypertension, and cardiovascular diseases, ultimately contributing to mortality. Korean Society for the Study of Obesity (KSSO) was established to improve the management of obesity through research and education; to that end, the Committee of Clinical Practice Guidelines of KSSO reviews systemic evidence using expert panels to develop clinical guidelines. The clinical practice guidelines for obesity were revised in 2018 using National Health Insurance Service Health checkup data from 2006 to 2015. Following these guidelines, we added a category, class III obesity, which includes individuals with body mass index (BMI) ≥35 kg/m2. Agreeing with the International Federation for the Surgery of Obesity and Metabolic Disorders, Asian Pacific Chapter consensus, we determined that bariatric surgery is indicated for Korean patients with BMI ≥35 kg/m2 and for Korean patients …

Photoluminescent graphene quantum dots (GQDs) have fascinating optical and electronic properties with numerous promising applications in biomedical engineering. In this work, we first studied the in vivo biodistribution and the potential toxicity of carboxylated photoluminescent GQDs. KB, MDA-MB231, A549 cancer cells, and MDCK normal cell line were chosen as in vitro cell culture models to examine the possible adverse effects of the carboxylated photoluminescent GQDs. The carboxylated GQDs are desirable for increased aqueous solubility. All cancer cells efficiently took up the carboxylated GQDs. No acute toxicity or morphological changes were noted in either system at the tested exposure levels. A long-term in vivo study revealed that the GQDs mainly accumulated in liver, spleen, lung, kidney, and tumor sites after intravenous injection. To reveal any potential toxic effect of the GQDs on treated mice …

Exosomes are endosome-derived nanovesicles involved in cellular communication. They are natural nanocarriers secreted by various cells, making them suitable candidates for diverse drug delivery and therapeutic applications from a material standpoint. They have a phospholipid bilayer decorated with functional molecules and an enclosed parental matrix, which has attracted interest in developing designer/hybrid engineered exosome nanocarriers. The structural versatility of exosomes allows the modification of their original configuration using various methods, including genetic engineering, chemical procedures, physical techniques, and microfluidic technology, to load exosomes with additional cargo for expanded biomedical applications. Exosomes show enormous potential for overcoming the limitations of conventional nanoparticle-based techniques in targeted therapy. This review highlights the exosome …

Broad Advanced System & Integrated Circuit (BASIC Lab)

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An Area and Power Efficient Fully Nonlinear 10-bit Column Driver with Time-Shared Multi-Gamma-Slope DAC and Time-Interleaved Sampling Buffer for Mobile AMOLED Displays

A Fully Integrated Portable Microplastic Detection System-on-Chip with High-Sensitivity RF MEMS Sensors and Narrow-Band Notch-Tracking Dielectric Discrimination Algorithms

Data-Driven Machine Learning Models for Predicting Engineering Properties in Deep-Sea Sediments

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대학별 입시끈

우리 연구실 모집

교수님 소개

이형민

연구실 키워드

알럼나이가 간 회사

연구실 지원 방법

대우 조건

연도별 논문 인용수

저널 & 학회 논문 출판 수

연구실 논문 목록

An Area and Power Efficient Fully Nonlinear 10-bit Column Driver with Time-Shared Multi-Gamma-Slope DAC and Time-Interleaved Sampling Buffer for Mobile AMOLED Displays

A Fully Integrated Portable Microplastic Detection System-on-Chip with High-Sensitivity RF MEMS Sensors and Narrow-Band Notch-Tracking Dielectric Discrimination Algorithms

Data-Driven Machine Learning Models for Predicting Engineering Properties in Deep-Sea Sediments

연구실 보유 특허

최근 3년간 연구실적 높은 연구실

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